Has your design process hit the RTL wall, with endless project cycle times that limit your progress to tape-out? Are you finding that incremental methodology improvements are causing too much disruption? This could be the time to evolve your design flow, break the barrier to true top down design, and get the functionality right quickly.

For years, designers have waited for a practical approach to synthesis and simulation at a level of abstraction that does not require detailed implementation to be defined. New technology from Get2Chip, Inc and Co-Design Automation will now allow the first steps into this paradigm, enabling efficient modeling and fast verification, with an automated route to silicon.

The SUPERLOG language allows Verilog models to be evolved using abstract modeling constructs and powerful verification capabilities. With SUPERLOG driving Get2Chip's VOLARE SL architectural synthesizer, abstract behavioral models may easily be transformed into efficient netlists. Co-Design's SYSTEMSIM simulator allows fast verification of the SUPERLOG model, together with powerful, integrated testbench capabilities and seamless C/C++ incorporation.

At the "Breaking the RTL Barrier" seminar we will show you the modeling styles, architectural synthesis advantages and technology that will realize productivity gains.

Break the RTL Barrier Seminar

When:
January 30th, 2001
Morning session: 10:00am to 12:00am - Afternoon session: 2:00pm to 4:00pm

Where:
Westin Hotel, Santa Clara, CA (next door to the DesignCon conference)

Agenda
Key Note Address - Gabe Moretti, Editor, EDN
The SUPERLOG language components
SYSTEMSIM - Incorporating abstract design with verification
VOLARE - Architectural synthesis techniques
Architectural Design Flow Concept Demonstration

For more information, contact:
Dave Kelf, Co-Design Automation   Tel: 617 571 9883    Email: davek@co-design.com
Lauro Rizzatti,Get2Chip   Tel: 1-408-436-6779   Email: lauror@get2chip.com

On the web at:

www.co-design.com

www.get2chip.com

Or contact your local Get2Chip or Co-Design Automation representative